Thursday, September 22, 2011

Origins of VLSI


Origins of VLSI
Much development motivated by WWII need for improved electronics, especially for radar
* 1940 - Russell Ohl (Bell Laboratories) - first pn junction
* 1948 - Shockley, Bardeen, Brattain (Bell Laboratories) - first transistor
* 1956 Nobel Physics Prize
* Late 1950s - purification of Si advances to acceptable levels for use in electronics
* 1958 - Seymour Cray (Control Data Corporation) - first transistorized computer - CDC 1604
* 1959 - Jack St. Claire Kilby (Texas Instruments) - first integrated circuit - 10 components on 9 mm2
* 1959 - Robert Norton Noyce (founder, Fairchild Semiconductor) - improved integrated circuit
* 1968 - Noyce, Gordon E. Moore found Intel
* 1971 - Ted Hoff (Intel) - first microprocessor (4004) - 2300 transistors on 9 mm2
Since then - continued improvement in technology has allowed for increased performance as predicted by Moore’s Law

Why VLSI


Why VLSI?

  • Integration improves the design
  • Lower parasitics = higher speed
  • Lower power consumption
  • Physically smaller
  • Integration reduces manufacturing cost - (almost) no manual assembly

What is VLSI

What is VLSI?
VLSI stands for "Very Large Scale Integration". This is the field which involves packing more and more logic devices into smaller and smaller areas.Thanks to VLSI, circuits that would have taken boardfuls of space can now be put into a small space few millimeters across! 

Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device

This has opened up a big opportunity to do things that were not possible before. VLSI circuits are everywhere ... your computer, your car, your brand new state-of-the-art digital camera, the cell-phones, and what have you. VLSI has been around for a long time, there is nothing new about it ... but as a side effect of advances in the world of computers, there has been a dramatic proliferation of tools that can be used to design VLSI circuits. 
Alongside, obeying Moore's law, the capability of an IC has increased exponentially over the years, in terms of computation power, utilisation of available area, yield. The combined effect of these two advances is that people can now put diverse functionality into the IC's, opening up new frontiers

The first semiconductor chips held two transistors each. Subsequent advances added more and more transistors, and, as a consequence, more individual functions or systems were integrated over time. The first integrated circuits held only a few devices, perhaps as many as ten diodes, transistors, resistors and capacitors, making it possible to fabricate one or more logic gates on a single device. Now known retrospectively as small-scale integration (SSI), improvements in technique led to devices with hundreds of logic gates, known as medium-scale integration (MSI). Further improvements led to large-scale integration (LSI), i.e. systems with at least a thousand logic gates. Current technology has moved far past this mark and today's microprocessors have many millions of gates and billions of individual transistors.

At one time, there was an effort to name and calibrate various levels of large-scale integration above VLSI. Terms like ultra-large-scale integration (ULSI) were used. But the huge number of gates and transistors available on common devices has rendered such fine distinctions moot. Terms suggesting greater than VLSI levels of integration are no longer in widespread use.

As of early 2008, billion-transistor processors are commercially available. This is expected to become more commonplace as semiconductor fabrication moves from the current generation of 65 nm processes to the next 45 nm generations (while experiencing new challenges such as increased variation across process corners). A notable example is Nvidia's 280 series GPU. This GPU is unique in the fact that almost all of its 1.4 billion transistors are used for logic, in contrast to the Itanium, whose large transistor count is largely due to its 24 MB L3 cache. Current designs, as opposed to the earliest devices, use extensive design automation and automated logic synthesis to lay out the transistors, enabling higher levels of complexity in the resulting logic functionality. Certain high-performance logic blocks like the SRAM (Static Random Access Memory) cell, however, are still designed by hand to ensure the highest efficiency

Wednesday, September 21, 2011

VLSI PROJECT LIST, IEEE 2010 

VLSI PROJECT LIST, IEEE 2010 
·         Design of SHA-1 Algorithm Based on FPGA
·        Algorithm of Binary Image Labeling and Parameter Extracting Based on FPGA
·        An FPGA-based Architecture for Linear and Morphological and Image filtering
·        Development of a New Breath Alcohol Detector without Mouthpiece to Prevent Alcohol-Impaired Driving
·        FPGA implementation for humidity and temperature remote sensing system
·        Hardware realization of shadow detection algorithm in fpga
·        Image Edge Detection Based on FPGA
·        Performance Efficient FPGA Implementation of Parallel 2-D MRI Image Filtering Algorithms using Xilinx System Generator
·        Recognition FPGA system for detection of anomalies in mammograms
·        RFID-based Hospital Real-time Patient Management System
·        Solid waste monitoring and management using RFID, GIS and GSM
·        Sort Optimization Algorithm of Median Filtering Based on FPGA
·        The Realization of Precision Agriculture Monitoring System Based on Wireless Sensor Network


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VLSI PROJECT LIST, IEEE 2011

VLSI PROJECT LIST, IEEE 2011 

  • A formal approach to designing cryptographic processor.
  • A novel low power and high speed Wallace tree multiplier for RISC processor.
  • A review on power optimization of linear feedback shift register for low power built in self test
  • An ultra low power BPSK receiver and demodulator based on injection locked oscillator.
  • Coping With the Obsolescence of Safety- or Mission-Critical Embedded Systems Using FPGAs
  • Efficient iterative techniques for soft decision decoding of reed Solomon codes.
  • FPGA Based Electronics for PET Detector Modules With Neural Network Position Estimators.
  • FPGA Design for Monitoring CAN bus Traffic in a Prosthetic Limb Sensor Network.
  • FPGA Implementation of BPSK Modem for Telemetry Systems Operating in Noisy Environments
  • FPGA-Based Configurable Frequency-Diverse Ultrasonic Target-Detection System.
  • FPGA-Based Parallel DNA Algorithm for Optimal Configurations of an Omni directional Mobile Service Robot
  • Performing Fire Extinguishment FPGAs in Industrial Control Applications.
  • Hardware-Efficient Image-Based Robotic Path Planning in a Dynamic Environment and Its FPGA Implementation.
  • Mapping multi-domain applications onto coarse-grained reconfigurable architectures.
 www.ncct.in, ncctchennai@gmail.com, 2823 5816, 984 11 93 224

  • Removal of impulse noise using 3x3 kernel FPGA implementation
  • Systematic design of RSA processors based on high-radix Montgomery multipliers.
  • The SoC Design and Realization of Small Scale Solar Irrigation Control System Based on FPGA.
  • Ultra wideband digital receiver implemented on FPGA for mobile robot indoor self-localization.
  • A Median Filter Fpga With Harvard Architecture
  • A New Adaptive Weight Algorithm For Salt And Pepper Noise Removal
  • A Pipeline Vlsi Architecture For High-Speed Computation Of The 1-D  Discrete Wavelet Transform
  • Adiabatic Technique For Energy Efficient Logic Circuits Design
  • An Fpga-Based Architecture For Linear And Morphological Image Filtering
  • Automatic Road Extraction Using High Resolution Satellite Images Based On Level Set And Mean Shift Methods
  • Design And Fpga Implementation Of Modified Distributive Arithmetic Based Dwt-Idwt Processor For Image Compression
  • Design Of A Low Power Flip-Flop Using Cmos Deep Submicron Technology
  • Detecting Background Setting For Dynamic Scene
  • Dual Stack Method A Novel Approach To Low Leakage And Speed Power Product Vlsi Design
  • Lossless Implementation Of Daubechies 8-Tap Wavelet Transform
  • Low-Power And Area-Efficient Carry Select Adder
  • Operation Improvement Of Indoor Robot By Gesture Recognition
  • Performance Analysis Of Integer Wavelet Transform For Image Compression
  • Removal Of High Density Salt And Pepper Noise Through Modified Decision Based Unsymmetric Trimmed Median Filter
 www.ncct.in, ncctchennai@gmail.com, 2823 5816, 984 11 93 224

  • 4 Bit SFQ Multiplier based on Booth Encoder
  • A Lightweight High-Performance Fault Detection Scheme For The Advanced Encryption Standard Using Composite Fields
  • A Rotation-Based BIST With Self-Feedback Logic To Achieve Complete Fault Coverage
  • An Autonomous Vectorscalar Floating Point Coprocessor For FPGAS
  • Building An AMBA AHB Compliant Memory Controller
  • Design And Characterization Of Parallel Prefix Adders Using FPGAS
  • Design And Implementation Of Cordic Processor For Complex DPLL
  • Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear Approximation
  • FPGA Based Real-Time Adaptive Fuzzy Logic Controller
  • High Speed ASIC Design Of Complex Multiplier Using Vedic Mathematics
www.ncct.in, ncctchennai@gmail.com, 2823 5816, 984 11 93 224

  • High-Accuracy Fixed-Width Modified Booth Multipliers For Lossy Applications
  • High-Speed Low-Power VITERBI Decoder Design For TCM Decoders
  • Ieee 1451-Based Multi-Interface Module (I2M) For Industrial Processes Automation
  • Implementation And Performance Analysis Of Seal Encryption On FPGA, GPU And Multi-Core Processors
  • Innovative Application Of RFID Systems To Special Education Schools
  • Low-Complexity Sequential Searcher For Robust Symbol Synchronization In OFDM Systems
  • Mobile Video Monitoring System Based On FPGA & GPRS
  • On The Transmission Method For Short Range MIMO Communications
  • Power Management Of MIMO Network Interfaces On Mobile Systems
  • PVT Variation Tolerant Current Source With On-Chip Digital Self-Calibration
  • Task Migration In Mesh NOCS Over Virtual Point-To-Point Connections
  • Technique Of LFSR Based Test Generator Synthesis For Deterministic And Pseudorandom Testing
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Tuesday, September 6, 2011

2011 IEEE Java Project Titles


2011 IEEE Project Titles, Java  
Java IEEE 2011 Project Titles

PROJECT TITLES & DOMAINS
MOBILE COMPUTING PROJECT TITLES (IEEE 2011 Java Mobile Computing Project Titles)
  • On the Information Flow Required for Tracking Control in Networks of Mobile Sensing Agents
  • Cross-Layer Jamming Detection and Mitigation in Wireless Broadcast Networks
  • Spatial -Temporal Coverage optimization in wireless Sensor Network
  • A Control Theoretic Approach to Distributed Optimal Configuration of 80211 WLANs
  • Autonomous Deployment of Heterogeneous Mobile Sensors
  • Design and Performance Analysis of Mobility Management Schemes Based on Pointer Forwarding
  • Effective Scheduling in Infrastructure Based Cognitive Radio Networks
  • Endpoint Based Call Admission Control and Resource Management for VoWLAN
  • Fast Detection of Mobile Replica Node Attacks in Wireless Sensor Networks Using Sequential Hypothesis Testing
  • MAC Layer Throughput Estimation in Impulse-Radio UWB Networks
  • Mobile Sampling of Sensor Field Data Using Controlled Broadcast
  • Optimal Stochastic Location Updates in Mobile Ad Hoc Networks
  • QoS Aware Routing and Admission Control in Shadow Fading Environments for Multirate MANETs
  • Secure High-Throughput Multicast Routing in Wireless Mesh Networks
  • The HIDENETS Holistic Approach for the Analysis of Large Critical Mobile Systems
  • Throughput Optimization in Mobile Backbone Networks

NETWORKING PROJECT TITLES (IEEE 2011 Java Networking Project Titles)
  • Component-Based Localization in Sparse Wireless Networks
  • Optimal Anycast Technique for Delay-Sensitive Energy-Constrained Asynchronous Sensor Networks
  • Model-Based Identification of Dominant Congested Links
  • Cross-Layer Optimization for Multimedia Transport over Multicode CDMA Networks
  • TOFU: Semi-Truthful Online Frequency Allocation Mechanism for Wireless Networks
  • On the Complexity of the Regenerator Placement Problem in Optical Networks
  • Jamming Aware traffic allocation for multipath routing using Routing using portfolio Selection
  • A Novel Approach for Failure Localization in All-Optical Mesh Networks
  • Energy Efficient Protocol for Cooperative Networks
  • Licklider Transmission Protocol (LTP) Based DTN for Cislunar Communications
  • Scheduling Algorithms for Multicarrier Wireless Data Systems
  • Selfish Overlay Network Creation and Maintenance
  • Star Block Design in Two-Level Survivable Optical Networks
  • Stochastic Model and Connectivity Dynamics for VANETs in Signalized Road Systems

NETWORK AND SERVICE MANAGEMENT PROJECT TITLES (IEEE 2011 Java Network and Service Management Project Titles)
  • Low-Overhead End-to-End Performance Measurement for Next Generation Networks
  • On the Impact of Security Protocols on the Performance of SNMP
  • Locating Equivalent Servants over P2P Networks

CLOUD COMPUTING PROJECT TITLE(IEEE 2011 Java Cloud Computing Project Titles)
  • Towards Secure and Dependable Storage Services in Cloud Computing
  • Going Back and forth Efficient Multi deployment and multisnapshotting on Clouds
  • Enabling public Auditability and data dynamics for storage security in clouding Computing
  • Performance Analysis of Cloud Computing Services for Many-Tasks Scientific Computing
  • Exploiting Dynamic Resource Allocation for Efficient Parallel Data Processing in the Cloud
  • Heuristics Based Query Processing for Large RDF Graphs Using Cloud Computing
  • Optimization of Resource Provisioning Cost in Cloud Computing
  • Performance Analysis of Cloud Computing Services for MTC-Based Scientific Computing
  • CloudTPS: Scalable Transactions for Web Applications in the Cloud

DEPENDABLE AND SECURE COMPUTING PROJECT TITLES (IEEE 2011 Java Dependable and Secure Computing Project Titles)
  • Anomaly Detection in Network Traffic Based on Statistical Inference and alpha-Stable Modeling 
  • ELMO: Energy Aware Local Monitoring in Sensor Networks
  • Efficient Fault Detection and Diagnosis in Complex Software Systems with Information-Theoretic Monitoring 
  • Privacy-Preserving Updates to Anonymous and Confidential Databases
  • Dynamics of Malware Spread in Decentralized Peer-to-Peer Networks 
  • Low-Energy Symmetric Key Distribution in Wireless Sensor Networks 
  • Replica Placement for Route Diversity in Tree-Based Routing Distributed Hash Tables
  • Robust Correlation of Encrypted Attack Traffic through Stepping Stones by Flow Watermarking
  • Online Intrusion Alert Aggregation with Generative Data Stream Modeling

KNOWLEDGE AND DATA ENGINEERING PROJECT TITLES (IEEE 2011 Java Knowledge and Data Engineering Project Titles)
  • Mining Cluster-Based Temporal Mobile Sequential Patterns in Location-Based Service Environments
  • A Link Analysis Extension of Correspondence Analysis for Mining Relational Databases
  • A Personalized Ontology Model for Web Information Gathering
  • A Machine Learning Approach for Identifying Disease-Treatment Relations in Short Texts
  • Design and Implementation of an Intrusion Response System for Relational Databases
  • Adaptive Cluster Distance Bounding for High Dimensional Indexing 
  • Classification and Novel Class Detection in Concept-Drifting Data Streams under Time Constraints
  • Cosdes: A Collaborative Spam Detection System with a Novel E-Mail Abstraction Scheme
  • Discovering Conditional Functional Dependencies
  • Clustering with Multi-Viewpoint based Similarity Measure KD

PARALLEL AND DISTRIBUTED SYSTEMS PROJECT TITLE(IEEE 2011 Java Parallel and Distributed System Project Titles)
  • Cooperative Channelization in Wireless Networks with Network Coding
  • Video Streaming Distribution in VANETs
  • Throughput Optimization in Multihop Wireless Networks with Multipacket Reception and Directional Antennas
  • Attribute-Based Access Control with Efficient Revocation in Data Outsourcing Systems
  • Network Immunization with Distributed Autonomy-Oriented Entities
  • Optimization of Rate Allocation with Distortion Guarantee in Sensor Networks
  • A Data Throughput Prediction and Optimization Service for Widely Distributed Many-Task Computing
  • Multicloud Deployment of Computing Clusters for Loosely Coupled MTC Applications
  • Toward Efficient and Simplified Distributed Data Intensive Computing

IMAGE PROCESSING PROJECT TITLES (IEEE 2011 Java Image Processing Project Titles)
  • Nonlocal PDEs-Based Morphology on Weighted Graphs for Image and Data Processing
  • Image Segmentation Using Fuzzy Region Competition and Spatial/Frequency Information 
  • Perceptual Segmentation: Combining Image Segmentation With Object Tagging
  • ViBe: A Universal Background Subtraction Algorithm for Video Sequences
  • Contextual Kernel and Spectral Methods for Learning the Semantics of Images
  • JPEG2000-Based Scalable Interactive Video (JSIV)
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044-28235816, 98411 93224, 93801 02891 
IEEE JAVA PROJECT TITLES 
 
CLOUD COMPUTING PROJECT TITLES 2011

 
  • Towards Secure and Dependable Storage Services in Cloud Computing
  • Going Back and forth Efficient Multi deployment and multisnapshotting on Clouds
  • Enabling public Auditability and data dynamics for storage security in clouding Computing
  • Performance Analysis of Cloud Computing Services for Many-Tasks Scientific Computing
  • Exploiting Dynamic Resource Allocation for Efficient Parallel Data Processing in the Cloud
  • Heuristics Based Query Processing for Large RDF Graphs Using Cloud Computing
  • Optimization of Resource Provisioning Cost in Cloud Computing
  • Performance Analysis of Cloud Computing Services for MTC-Based Scientific Computing
  • CloudTPS: Scalable Transactions for Web Applications in the Cloud
  • Ensuring Data Storage Security in Cloud Computing, Cloud Computing - 2010